The first time i read about this rumour was three years ago. It's a
hoax as far as i can tell, and experts on the hardware forums i visit agree. The problem is evident if you have some knowledge of how cpu's work internally. Basically, offloading work to another CPU over a HyperTransport link is way too slow, you can't just send off some work and have it come back when it's done. Code is full of conditions and branches, memory pointers that have yet to be calculated, and so forth, that would make this highly impractical. The bottleneck is often not the functional unit of the cpu, but other units such as the instruction decoder, branch predictor or memory latency, things you can't do faster on another processor even if its idle.
Intel had to significantly adapt their current P4 design called "Prescott" to allow even higher clock frequencies, because the speed with which information travelled electronically was too slow to keep the area of one cpu, not more than 20mm across, sychronised. The area close to the clock signal generator would be working on one tick, while the area further away would still be processing the previous tick. That's the sort of speed modern cpu's work at. Literally lightspeed. It's not hard to see how difficult it would be to offload work to another cpu 20cm away, and still have your work be done faster overall. Even within a dual-core cpu this would be hard to implement. Just improving the CPU itself would be far easier.
Intel's HyperThreading was a technology designed to improve efficiency, it was designed to scavenge portions of the cpu not used by one task to use them for another. This hyped "reversed ht" would lower efficiency. It would occupy another CPU that could be doing it's own work much faster. With the future being mutlicore and multithreaded, it really doesn't make sense to work on this.
Intel's new Core architecture is the fastest and AMD has no immediate answer. Live with it. That said, i could be wrong, the world is full of surprises, but this isn't just my rant, but the opinion of a range of experts and tech journalists.
AMD's being rather secretive about their plans for the future, two things we will be likely to get are the K8L, a K8 design with doubled floating point executing power, estimated to increase floating point performance by some 50% in real world applications, and Z-Ram technology to enable faster, denser, larger L2 caches, or possibly even large L3's, Xeon MP style. Both are at least a year away.
I'm sympathetic to AMD, and by no means an Intel fan, let that be clear, but i won't let that cloud my judgement.
